Product
Focus on technical applications such as motion control data acquisition and br equipment IoT
| Specifications | |||
| Mode name | Express-BD7 | ||
| Core System | |||
CPU | Intel® Xeon® D and Pentium® D SoC, 14nm process (formerly”Broadwell-DE”) Xeon® D1559 1.6/2.1GHz 18MB, 45W (12C) (eTEMP) Xeon® D1539 1.6/2.2GHz 12MB, 35W (8C) (eTEMP) Xeon® D1577 1.3/2.1GHz 24MB, 45W (16C) Xeon® D1548 2.0/2.6GHz 12MB, 45W (8C) Xeon® D1527 2.2/2.7GHz 6MB, 35W (4C) Pentium® D1508 2.2/2.6GHz 3MB, 25W (2C) Pentium® D1519 1.5/2.1GHz 6MB, 25W (4C) (eTEMP) Note: SKUs not listed above and D1577/D1559 may be supported on a project basis. please contact your ADLINK representative. Supports: Intel® VT (including VT-x, VT-d, VT-x with Extended Page Tables), Intel® HT Technology, Intel® SSE4.2, Intel® 64 Architecture, Intel® Turbo Boost Technology 2.0, Intel® AVX2, Intel® TSX-NI, Intel® Platform Protection Technology with Intel® TXT, Execute Disable Bit, Intel® Data Protection Technology with Intel® Secure Key, Intel® AES-NI Note: Availability of features may vary between processor SKUs. | ||
| Memory | Dual channel 1867/2133/2400 MHz DDR4 ECC memory up to 32GB in dual SODIMM sockets (dependent on SoC SKU) Note: Only D1548 support up to 2400 MHz Only D1548 support up to 1866 MHz | ||
Embedded BIOS | AMI EFI with CMOS backup in 16MB SPI BIOS | ||
| Cache | 24MB for D1577 18MB for D1559 12MB for D1548/D1539 6MB for D1527/D1519 3MB for D1508 | ||
| Expansion Busses | PCIe x16 or 2 PCIe x8 or 4 PCIe x4 (Gen3) 8 PCIe lanes (Gen3): AB connector, Lanes 8-15 6 PCIe lanes (Gen2): AB connector, Lanes 0/1/2/3/4/5 Up 2 PCIe lanes (Gen2): CD connector, Lanes 6/7 LPC bus, SMBus (system) , I2C (user) Note: PCI Express lane 7 support in place of GbE | ||
SEMA Board Controller | Supports: Voltage/current monitoring, power sequence debug support, AT/ ATX mode control, logistics and forensic information, flat panel control, general purpose I2C, failsafe BIOS (dual BIOS ), watchdog timer and fan control | ||
| Debug Headers | 40-pin multipurpose flat cable connector for use with DB-40 debug module providing BIOS POST code LED, BMC access, SPI BIOS flashing, power testpoints, debug LEDs 60-pin XDP header for ICE debug of CPU/chipset | ||
| 10G Ethernet | |||
Intel® MAC/Controller | Intel® 10G Ethernet Controller integrated in SoC | ||
| 10G Interface | 2x 10GBASE-KR | ||
| 10G Sideband Signals | 10G_INT 10G_PHY_MDIO/MDC & SDA/SCL 10G_PHY_CAP 10G_PHY_RST 10G_LED_I2C 10G_SFP_I2C 10G_SDP | ||
| NC-SI | NC-SI supported on AB connector,connect to GbE controller | ||
| Ethernet | |||
| Intel® MAC/PHY | Intel® Ethernet Connection i210-LM with Intel® AMT 10.0 support | ||
| Interface | 10/100/1000 GbE connection | ||
| Multi I/O and Storage | |||
USB | 4x USB 3.0/2.0 (USB 0, 1, 2, 3) | ||
| SATA | 2x SATA 6Gb/s (SATA0,1,2,3) | ||
| Serial | 2 UART ports with console redirection | ||
| GPIO | 4 GPO and 4 GPI | ||
| Super I/O | |||
| Supported on carrier if needed (standard support forW83627DHG-P) | |||
| TPM | |||
| Chipset | Infineon | ||
| Type | TPM2.0 | ||
| Power | |||
| Standard Input | ATX: 12V±5%, 5Vsb ±5%; AT: 12V±5% | ||
| Wide Input | ATX: 8.5-20V, 5Vsb ±5%; AT: 8.5-20V | ||
| Management | ACPI 5.0 compliant, Smart Battery support | ||
| Power States | C1-C6, S0, S1, S3, S4, S5 , S5 ECO mode (Wake-on-USB S3/S4,WOL S3/S4/S5) | ||
| ECO mode | Supports deep S5 mode for power saving | ||
| Operating Systems | |||
| Standard Support | Windows Server 2012 (64-bit) Windows 7 (64-bit) Linux (64-bit) | ||
| Extended Support (BSP) | Linux (64-bit) | ||
| Mechanical and Environmental | |||
| Form Factor | PICMG COM.0 Rev 3.0 , Type 7 | ||
| Dimension | 125 mm x 95 mm | ||
| Operating Temperature | Standard: 0°C to 60°C Extreme Rugged: -45°C to +85°C (build option, standard voltage only) Note: Extreme Rugged availability dependent on SoC SKU | ||
| Humidity | 5-90% RH operating, non-condensing 5-95% RH storage (and operating with conformal coating) | ||
| Shock and Vibration | IEC 60068-2-64 and IEC-60068-2-27 MIL-STD-202F, Method 213B, Table 213-I, Condition A and Method 214A, Table 214-I, Condition D | ||
| HALT | Thermal Stress, Vibration Stress, Thermal Shock and Combined Test | ||
